Directions:Consider the CMOS circuit shown, where the gate voltage v0 of the n-MOSFET is increased from zero, while the gate voltage of the p−MOSFET is kept constant at 3 V. Assume that, for both transistors, the magnitude of the threshold voltage is 1 V and the product of the trans-conductance parameter is 1 mA V-2.
Estimate the output voltage V0 for VG = 15 V. (A) 4 - (B) 4 + (C) 4 - (D) 4 +
Prescribes books for gate ECE..
Network Analysis: Van Valkenburg
Network and Systems: D. Roy Choudhary
Integrated Electronics: Jacob Milman & C. Halkias, Millman & Grabel
Integrated Circuits: K.R. Botkar
Op. Amps & Linear Integrated Circuit: Gayakwad
Digital Logic & Computer Design: Moris Mano
Signals and System: Oppehum, Willsky & Nacob
Automatic Control System: Benjamin C. Kuo
Control System Engineering: Nagrath & Gopal
Principle of Communication System: Taub & Schilling
Communication System: A. Bruu Carlson
Electromagnetic Waves & Radiating Systems: Jardon & Balmain, JD Kraus
Hi frnds here is a link for the ebook of RK Kannodia.. knwn to be best for MCQs for ECE gate.. goodluck.. :)
http://www.ziddu.com/downloadlink/12991950/GATEECERKKanodia.pdf